Matthew Padilla and Dr. Shiuh-hua Wood Chiang, Department of Electrical and Computer Engineering
Currently most digital converters convert from an analog voltage signal to a digital signal. In recent years some progress has been made in converting from an analog time signal to a digital signal. The purpose of this project is to improve upon current designs of time-to-digital converters by making a time-difference amplifier that is more power efficient and less sensitive to variation.
Currently time-to-digital converters are commonly implemented similarly to analog voltage-to-digital converters, using a two-step architecture . In a voltage-to-digital converter, the first stage is a coarse quantizer, and the difference between the voltage signal and the quantization is then amplified. The amplified signal is then passed through another quantizer before being converted to a digital signal [1,2]. Time-to-digital converters can use the same process but using time instead of voltage. However, amplifying time is more challenging than amplifying voltage. Thus, there is a need for time-difference amplifiers (TDA).
For the project I created a TDA using CMOS technology. I used the Cadence tool to simulate the design of the amplifier. Current state-of-the-art TDAs are very sensitive to variations in process, voltage, and temperature (PVT) due to the sensitivity of the meta-stability of the circuit, which is the key factor in achieving time amplification. Simulations of an SR latch-based TDA show that it has a gain of 16.3 second/second with an input supply voltage of 1.8 V. Any slight variation in this supply voltage changes the gain. For example lowering the supply voltage to 1.7 V increases the gain by of 2.5%, and raising the supply voltage to 1.9 V decreases the gain by 1.8%. In the project, I created a new TDA that is more robust and less sensitive to variations. To do this I used variable capacitors that are made from MOSFETs that can be turned on or off. This gives the ability to adjust the gain of the amplifier by turning these MOSFETs on or off. I then grouped MOSFETs into groups so that by turning one group of MOSFETs on or off the gain was adjusted by 0.25 times. For example the nominal gain was 16 and by turning on another set of MOSFETs it raised to 16.25. Thus when a variation occurs the amplifier gain could be adjusted to offset the change in the gain caused by the variation.
I changed the supply voltage 10% from 1.8V up to 1.98V. This lowered the gain of the amplifier. Thus more of the MOSFET capacitors needed to be turned on so that the gain could return to what it was before the change in voltage. The plot above shows the output of the original capacitance for a gain of 16, and also adjusted capacitances for gains of 16.25 and 16.5 with no change in supply voltage. The change in supply voltage and the change in gain counteract each other and result in an actual gain that is much closer to 16 than without the capacitance of the amplifier being adjusted. Adjusting the gain also adjusts the region where the amplifier meets the linearity requirement, which is the region where the output of the amplifier has small enough error to be used. By changing the gain to be 16.25, the region where the linearity was met was extended from -50 ps to 50 ps to then be -57 ps to 56 ps with a gain of 16.25. This is an increase of 13% for the linear region. When the gain was 16.5 it was too high and the amplifier output left the linearity region earlier then when the gain was 16 and 16.25. When the supply voltage is lowered the gain rises, and in turn the capacitance of the amplifier can be lowered to compensate for the rising gain and maintain a gain close to 16.
The results show that adjustments can be made to an amplifier to adjust it back to the correct gain after PVT variations occur. The overall gain will not be exactly the same as what was designed for with no change to PVT, but by adjusting the capacitance the gain will be returned to a value that is much closer to the nominal gain. This means that the amplifier can hopefully be in the linear region for a range similar to the range before the variation. This gain correction can be applied to an amplifier that is designed for any gain output. Adjustments would need to be made to the blocks of MOSFETS that are turned on and off to adjust the capacitance by an amount that is in line with the overall gain of the amplifier for when a section of MOSFETs is turned on.
The block of capacitors that are turned on and off can be controlled with a Verilog A controller. To do this a known delay is passed in as the input to the amplifier and then the first output from the amplifier is passed through a delay chain that is equal to the gain of the amplifier. Thus the second output of the amplifier and the output from the delay chain should come out at the same time. An arbiter can be used to determine which comes first. If the arbiter determines that the amplifier signal comes first more MOSFETS should be turned on, and the opposite is true when the signal from the delay chain comes first . Using a thermometer code based controller it can be determined which capacitors should be turned on or off. For example, a nine bit arbiter code would start as “000011111” for a gain of 16. The zeros represent that block of MOSFETS being turned off, and the ones being turned on. Then if the gain is too low it shifts to become “000111111”, or if it is too high it becomes “000001111”. According to the signal that comes from the arbiter another section of MOSFETS is either turned off or turned, adjusting the gain by .25x.
I believe that this form of feedback will function well enough to counteract the effects of PVT variations. Although it is not a normal feedback loop where the difference is taken between the ideal and the actual values and used to adjust the gain, there is feedback in that the amplifier is told whether another section of MOSFETS needs to be turned on or off. This type of feedback is more cyclical to arrive at the correct number of MOSFET sections that need to turn on, in that if the gain is very far off it will take up to four cycles with a 9 bit controller to get all the bits on or off. This can be done by passing in the same signal four times to the same amplifier, or also by sending one signal through four different amplifiers. The controller value from one amplifier is used to control the next amplifier, so that the last amplifier is set to the correct gain.
 Mandai, S.; Charbon, E., “A 128-channel, 9ps column-parallel two-stage TDC based on time difference amplification for time-resolved imaging,” in ESSCIRC (ESSCIRC), 2011 Proceedings of the, vol., no., pp.119-122, 12-16 Sept. 2011
 Minjae Lee; Abidi, A.A., “A 9 b, 1.25 ps Resolution Coarse–Fine Time-to-Digital Converter in 90 nm CMOS that Amplifies a Time Residue,” in Solid-State Circuits, IEEE Journal of , vol.43, no.4, pp.769-777, April 2008
 B. Tong, W. Yan and X. Zhou, “A constant-gain time-amplifier with digital self-calibration,” 2009 IEEE 8th International Conference on ASIC, Changsha, Hunan, 2009, pp. 1133-1136.